Protecting Silicon Innovation: What India's Semiconductor IC Layout-Design Numbers mean for Indian Companies

India's semiconductor ambitions are usually discussed in terms of fabs, packaging units, and PLI-linked investment. Less visible, but equally important for companies actually designing chips, is the legal regime that protects the layout itself — the specific arrangement of transistors, interconnects, and circuit elements that makes a chip work and that took months (or years) of design effort to create. This protection is governed by the Semiconductor Integrated Circuits Layout-Design Act, 2000 (“SICLD Act”), administered by the Semiconductor Integrated Circuits Layout-Design Registry (“SICLDR”), which now functions under the Office of the Controller General of Patents, Designs & Trademarks (CGPDTM), Department for Promotion of Industry and Internal Trade (DPIIT).

The CGPDTM's Annual Report 2024-25 gives a useful, if sobering, picture of how this registry is actually being used — and the numbers point to a clear opportunity for Indian companies that are currently leaving this form of protection on the table.

The Act protects the three-dimensional configuration of the layers of semiconductors, metals, and dielectrics that make up an integrated circuit — referred to under the Act as an “integrated circuit layout.” To qualify for registration, a layout-design must be:

1. Original;

2. Distinctive;

3. Capable of being distinguished from any other layout-design; and

4. Not commercially exploited anywhere in India or in a convention country prior to filing.

This is a standalone IP right, separate from patents (which may cover the underlying circuit function or fabrication process) and from copyright or design protection. For companies engaged in chip design — whether analog RF, MMIC, digital logic, or mixed-signal — it is often the most direct way to protect the layout itself against copying.

According to the Annual Report 2024-25, as of 31st March 2025:

1. Only seven (07) certificates of registration have ever been issued under the SICLD Act since the Registry became operational.

2. Thirty-one (31) SICLD applications have been filed in total.

3. Of these, fifteen (15) have been examined — of which seven (07) were registered and eight (08) were not accepted or were abandoned.

4. In 2024-25 alone, six (06) new applications were received and underwent preliminary scrutiny.

Filing volumes over the last five years, per the Annual Report's comparative table, have fluctuated without a clear growth trend: 5 (2020-21), 2 (2021-22), 8 (2022-23), 2 (2023-24), and 6 (2024-25). By contrast, patent filings in the same period rose from 58,503 to 1,10,375, and design filings from 14,241 to 43,005 — both roughly doubling. The SICLD registry has not shown comparable growth.

Almost all registrations belong to two entities. Of the seven certificates issued to date, five belong to Bharat Electronics Limited (BEL) and one to the Indian Space Research Organisation (ISRO); the remaining BEL registration rounds out the total. In other words, this form of protection has, to date, been used almost exclusively by public sector defence and space undertakings — not by India's private fabless design houses, R&D centres of multinational semiconductor companies operating in India, or the growing base of chip-design startups the government's semiconductor mission is trying to cultivate.

Table 3 is the starkest of the three: in 2020-21, 2021-22, and 2024-25, zero (NIL) semiconductor layout-designs were granted/registered — against a backdrop of tens of thousands of patents, designs, and trademarks being granted each year over the same period. Even in the two years where grants occurred (2022-23 and 2023-24), the volume was in single digits.

India's semiconductor push — spanning fabrication incentives, design-linked incentive schemes, and a rapidly expanding base of chip design centres — is generating a large volume of layout-design work inside India. Much of this is currently protected, if at all, only through patents (which do not cover the layout itself, only the underlying invention where patentable) or through confidentiality and contractual restrictions. The SICLD Act offers a registrable right specifically over the layout, and it currently has very little competition for registration slots: with only 31 applications filed in over two decades of the registry's operation, and no evident backlog pressure, applicants can expect the process to be comparatively fast and inexpensive relative to patent prosecution.

For Indian companies — whether established electronics manufacturers, semiconductor design startups, or R&D captive centres of global chip companies — this presents a low-cost, currently underexploited opportunity to secure an additional, independent layer of IP protection over original chip layouts, ahead of commercial exploitation (a strict precondition under the Act). Companies that already patent their circuit innovations, or protect fabrication processes, should evaluate whether their layout-designs — as distinct three-dimensional arrangements — also merit a SICLD filing, particularly where reverse engineering or layout copying is a live commercial risk.

1. File before commercial exploitation. The Act's requirement that the layout not have been commercially exploited in India or a convention country is strict — companies should build SICLD filing into their IP strategy at the design-freeze stage, not after product launch.

2. Treat it as complementary, not alternative, protection. A SICLD registration protects the layout; it does not substitute for patent protection of the underlying circuit function or fabrication innovation.

3. Private sector uptake remains minimal — this is an opening, not a saturated field. With registrations concentrated in two public sector entities, private semiconductor and electronics companies operating in India have significant white space to establish their own portfolio of registered layout-designs.

4. Build SICLD filings into broader India semiconductor strategy. As design activity scales under India's semiconductor mission, companies setting up or expanding design centres in India should factor layout-design registration into their IP governance framework alongside patents, designs, and trade secrets.

About the authors: Vikrant Rana is the Managing Partner of S. S. Rana & Co.

Disclaimer: The opinions expressed in this article are those of the author(s). The opinions presented do not necessarily reflect the views of Bar & Bench.

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